1. Field of the Disclosure
The present disclosure generally relates to the fabrication of semiconductor devices, and, more particularly, to a method for forming replacement gate structures for vertical transistors.
2. Description of the Related Art
The fabrication of advanced integrated circuits, such as CPU's, storage devices, ASIC's (application specific integrated circuits) and the like, requires the formation of a large number of circuit elements in a given chip area according to a specified circuit layout. Field effect transistors (NMOS and PMOS transistors) represent one important type of circuit element that substantially determines performance of such integrated circuits. During the fabrication of complex integrated circuits using, for instance, MOS technology, millions of transistors, e.g., NMOS transistors and/or PMOS transistors, are formed on a substrate including a crystalline semiconductor layer. A field effect transistor, whether an NMOS or a PMOS device, is a planar device that typically includes a source region, a drain region, a channel region that is positioned between the source region and the drain region, and a gate structure positioned above the channel region. The gate structure is typically comprised of a very thin gate insulation layer and one or more conductive layers that act as a conductive gate electrode. In a field effect transistor, the conductivity of the channel region, i.e., the drive current capability of the conductive channel, is controlled by applying an appropriate voltage to the gate electrode.
Field effect transistors come in a variety of different configurations, e.g., planar devices, FinFET devices, vertical transistor devices, etc. As technology advances, there is a constant demand to reduce the overall size of the IC products to reduce the size of the consumer products incorporating such IC products. Vertical transistor devices, with their vertically oriented channel structure, present one promising choice for advanced IC products given the potential space savings achieved by using such devices. Modern integrated circuit (IC) products typically include a very large number of active individual circuit elements, such as field effect transistors, as well as numerous passive circuit elements, such as capacitors, resistors and the like. These circuit elements are combined in various arrangements to make integrated circuits that perform a variety of functions so as to enable the IC product to perform its intended function.
To balance the threshold voltages of CMOS devices, different gate materials are typically used for PMOS versus NMOS devices. The gate materials are generally formed using a replacement gate process that replaces a placeholder material with the desired gate materials. Due to the space constraints associated with vertical transistor devices, it is difficult to implement a replacement gate process to form different gate materials.
The present disclosure is directed to various methods and resulting devices that may avoid, or at least reduce, the effects of one or more of the problems identified above.